INPUT or IN Primitive/Port

AHDL Syntax Verilog HDL Example Instantiation VHDL Syntax Source Destination

in1 : INPUT;

input in1

in1 : IN

Device I/O or dedicated input pins, or higher levels in the hierarchy tree

All logic functions except BIDIR, VCC, and GND

In a Block Design File (.bdf) Definition, you can use the Pin Properties dialog box to specify pin properties for this primitive, such as the pin name and default value.

  • Assigning an unconnected INPUT primitive to a pin number reserves the pin for future use.
  • Only the pin assignments of the top-level entity are used during compilation.
  • For information about Quartus® Prime primitive instantiation, go to Using a Quartus® Prime Logic Function.