Upgrade IP Components Dialog Box
IP core variants generated with a different version or edition of the Quartus® Prime software may require upgrading before use in the current version or edition of the Quartus® Prime software. Click Project > Upgrade IP Components to identify and upgrade IP core variants. When you open a project containing outdated IP, the Project Navigator displays a banner indicating the IP upgrade status. Click Launch IP Upgrade Tool, or to upgrade outdated IP cores.
The Upgrade IP Components dialog box provides instructions when IP upgrade is required, optional, or unsupported for specific IP cores in your design. You must upgrade IP cores that require it before you can compile the IP variation in the current version of the Quartus® Prime software. Many Intel FPGA IP cores support automatic upgrade. The upgrade process renames and preserves the existing variation file (.v, .sv, or .vhd) as <my_variant>_BAK.v, .sv, .vhd in the project directory.
You can target the latest device families with IP originally generated for a different device after migration. Some Intel FPGA IP cores require individual migration to upgrade. The Upgrade IP Components dialog box prompts you to double-click and regenerate IP cores that require individual migration.
You can use scripts to automate simulation processing in your preferred simulation
environment. Intel recommends the use of a version-independent top-level simulation
script to control design, testbench, and IP core simulation. Because Quartus
Prime-generated simulation file names may change after IP upgrade or regeneration,
Intel recommends that your top-level simulation script "sources" any generated setup
scripts, rather than using the generated setup scripts directly. You can use the
ip-setup-simulation utility to generate or regenerate underlying
setup scripts after any software or IP version upgrade or regeneration. Use of a
top-level script and
ip-setup-simulation eliminates the requirement to
manually update simulation scripts.
Click Generate Combined Simulator Setup Script for IP to generate a combined simulator setup script for all Intel FPGA IP cores in your project. You can specify options to compile all files in to the work directory, and to use relative paths.