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OPNDRN Primitive |
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The OPNDRN primitive is similar to a TRI
primitive, with a single input and a single output. An OPNDRN
primitive fed by a signal called my_signal is equivalent
to a TRI primitive whose output enable input is fed by the
complement of my_signal, and whose primary input is fed by
a GND primitive.
If the input to the OPNDRN primitive is low, the output
will be low. If the input is high, the output will be a high-impedance
logic level.
When you use an OPNDRN buffer, you must observe the following
rules in addition to the rules listed in Primitive/Port
Interconnections:
An OPNDRN buffer may drive only one BIDIR. You must
use a BIDIR pin if feedback is included after the OPNDRN
buffer.
If an OPNDRN buffer feeds logic, it must
also feed a BIDIR pin. If it feeds a BIDIR pin,
it may not feed any other outputs.
To perform functional simulations, you must use the altera_primitives.v library located in the <Quartus II installation directory>\eda\sim_lib directory. For VHDL, you must use the altera_primitives.vhd library located in the <Quartus II installation directory>\eda\sim_lib directory.
Verilog HDL Example Instantiation:
OPNDRN <instance_name> (.in(<input_wire>), .out(<output_wire>));
The following VHDL component declaration is located in the VHDL Design File (.vhd)ALTERA_PRIMITIVES_COMPONENTS.VHD located in the <Quartus II installation directory>\libraries\vhdl\altera directory.
component opndrn
port (
a_in : in std_logic;
a_out : out std_logic );
end component;
The VHDL LIBRARY-USE declaration is not required if you use the VHDL Component Declaration.
LIBRARY altera;
USE altera.altera_primitives_components.all;
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Note: For information about Quartus II primitive instantiation, go to Using a Quartus II Logic Function. |
