Chip Planner

About Post-Compilation Changes

 


The Quartus II software provides tools that allow you to view the placement and routing details of a compiled design, and to make minor changes to the design without having to recompile it. These tools enable you to correct functional flaws or implement last-minute engineering change orders (ECOs) on the post-fitting netlist without having to rerun synthesis or place and route operations. These tools can greatly reduce the time required to implement design changes, while having minimal impact on the timing characteristics of the design.

You can implement post-compilation changes to properties of the following resource types:

ExpandTools for making and managing post-compilation changes:

ExpandGeneral work flow for post-compilation changes:

 

Note: For examples of using the Chip Planner, Resource Property Editor, and Change Manager to make and manage post-compilation changes, refer to the following topics:

 

For a more detailed discussion of post-compilation changes, see the "Engineering Change Management with the Chip Planner" chapter in the Quartus II Handbook, vol. 2, which is available from the Literature section of the Altera website.

 

 

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