csfifo Megafunction


Parameterized cycle-shared FIFO megafunction. Altera recommends that you use lpm_fifo instead of csfifo for single-clock FIFO functions, and that you use lpm_fifo_dc instead of csfifo for dual-clock FIFO functions. The csfifo function uses DFFE primitives or latch arrays in MAX 3000 and MAX 7000 devices or if the USE_EAB parameter is set to "OFF". Altera strongly recommends using synchronous rather than asynchronous RAM functions. The csfifo megafunction is provided for backward compatibility only, and is not available for Cyclone, Cyclone II, Stratix, and Stratix GX designs.




ExpandAHDL Function Prototype (port name and order also apply to Verilog HDL):

ExpandVHDL Component Declaration:

ExpandVHDL LIBRARY-USE Declaration:

ExpandInput Ports:

ExpandOutput Ports:



Rate This Page