csdpram Megafunction


Parameterized cycle-shared dual-port RAM megafunction. The csdpram function uses DFFE primitives or latch arrays in MAX 3000 and MAX 7000 devices or if the USE_EAB parameter is set to "OFF". Altera strongly recommends using synchronous rather than asynchronous RAM functions. The csdpram megafunction is provided for backward compatibility only, and is not available for Cyclone, Cyclone II, Stratix, and Stratix GX designs.




ExpandAHDL Function Prototype (port name and order also apply to Verilog HDL):

ExpandVHDL LIBRARY-USE Declaration:

ExpandInput Ports:

ExpandOutput Ports:



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